1. Field of the Invention
This invention relates to the field of data processing systems. More particularly, this invention relates to the field of contention management within hardware transactional memories.
2. Description of the Prior Art
It is desirable to perform parallel processing of program code. As multi-processor systems have become more widely available, the use of parallel processing of computer programs has become wide spread. Whilst such parallel processing can significantly improve performance, it suffers from the disadvantage of an increased complexity in the writing computer programs suitable for parallel execution. One technique uses software locks to enforce exclusive access to data items so as to avoid different portions of a computer program being executed in parallel inappropriately interfering with each other. A difficulty of this approach is that the programs must be written to set and reset the locks at appropriate times; this is a complex and error prone task.
An alternative approach to facilitating the parallel processing of computer programs is the use of a transactional memory. With this approach a computer program can be considered to be broken down into two distinct types of entities. These are “processing threads” and “processing transactions”. A “processing thread” is a piece of computer code that runs on a single processor concurrently with code running on other processors. A “processing transaction” is a piece of work that is executed by a thread, where memory accesses performed by the transaction appear atomic as far as other threads and transactions are concerned. A single thread can execute many transactions.
A transactional memory system may be implemented fully as a software layer, fully in hardware or a combination of the two. For the purposes of this description, a hardware transactional memory system is understood to have at least some hardware features supporting the transactional memory model. Whilst the description focuses on a hardware transaction memory system, the invention is applicable to a software only transactional memory system.
A hardware transactional memory serves to identify conflicts arising between processing transactions, e.g. read-after-write hazards. If such a conflict arises where two processing transactions seek to access the same data, then the hardware transactional memory triggers an abort of at least one of the processing transactions and the restoring of the state prior to initiation of that processing transaction. The scheduling mechanisms within the data processing system will then reschedule that processing transaction to be executed at a later time, this later time typically being determined on the basis of an exponential backoff whereby the scheduling mechanism suspends the transaction for a time before it is rescheduled to provide the opportunity for the conflict to be removed by completion of the conflicting processing transaction. If the rescheduled processing transaction conflicts again, then it can again be aborted and rescheduled after an exponentially increased delay.